ADT7476A
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58
Table 69. PWM MINIMUM DUTY CYCLE REGISTERS (Note 1)
Register Address
R/W
Description
Power-On Default
0x64
R/W
PWM1 Minimum Duty Cycle
0x80 (50% Duty Cycle)
0x65
R/W
PWM2 Minimum Duty Cycle
0x80 (50% Duty Cycle)
0x66
R/W
PWM3 Minimum Duty Cycle
0x80 (50% Duty Cycle)
Bit No.
Name
R/W
Description
[7:0]
PWM Duty
Cycle
R/W
These bits define the PWM
MIN
duty cycle for PWMx.
0x00 = 0% Duty Cycle (Fan Off)
0x40 = 25% Duty Cycle
0x80 = 50% Duty Cycle
0xFF = 100% Duty Cycle (Fan Full Speed)
1. These registers become read-only when the ADT7476A is in automatic fan control mode.
Table 70. T
MIN
REGISTERS (Note 1 and 2)
Register Address
R/W
Description
Power-On Default
0x67
R/W
Remote 1 Temperature T
MIN
0x5A (90癈)
0x68
R/W
Local Temperature T
MIN
0x5A (90癈)
0x69
R/W
Remote 2 Temperature T
MIN
0x5A (90癈)
1. These are the T
MIN
registers for each temperature channel. When the temperature measured exceeds T
MIN
, the appropriate fan runs at
minimum speed and increases with temperature according to T
RANGE
.
2. These registers become read-only when the Configuration Register 1 Lock bit is set. Any further attempts to write to these registers have no
effect.
Table 71. THERM
LIMIT REGISTERS (Note 1 and 2)
Register Address
R/W
Description
Power-On Default
0x6A
R/W
Remote 1 THERM
Temperature Limit
0x64 (100癈)
0x6B
R/W
Local THERM
Temperature Limit
0x64 (100癈)
0x6C
R/W
Remote 2 THERM
Temperature Limit
0x64 (100癈)
1. If any temperature measured exceeds its THERM
limit, all PWM outputs drive their fans at 100% duty cycle. This is a fail-safe mechanism
incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that software
or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below
THERM
limit hysteresis. If the THERM
pin is programmed as an output, exceeding these limits by 0.25癈 can cause the THERM
pin to
assert low as an output.
2. These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to these registers have
no effect.
Table 72. TEMPERATURE/T
MIN
HYSTERESIS REGISTERS (Note 1 and 2)
Register Address
R/W
Description
Power-On Default
0x6D
[3:0]
[7:4]
R/W
HYSL
HYSR1
Remote 1 and local temperature hysteresis.
Local temperature hysteresis. 0癈 to 15癈 of hysteresis
can be applied to the local temperature AFC control
loops.
Remote 1 temperature hysteresis. 0癈 to 15癈 of hyster-
esis can be applied to the Remote 1 temperature AFC
control loops.
0x44
0x6E
R/W
HYSR2
Remote 2 temperature hysteresis.
Local temperature hysteresis. 0癈 to 15癈 of hysteresis
can be applied to the local temperature AFC control
loops.
0x40
1. Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for that
channel falls below its T
MIN
value, the fan remains running at PWM
MIN
duty cycle until the temperature = T
MIN
hysteresis. Up to 15癈 of
hysteresis can be assigned to any temperature channel. The hysteresis value chosen also applies to that temperature channel if its THERM
limit is exceeded. The PWM output being controlled goes to 100% if the THERM
limit is exceeded and remains at 100% until the temperature
drops below THERM
hysteresis. For acoustic reasons, it is recommended that the hysteresis value not be programmed less than 4癈.
Setting the hysteresis value lower than 4癈 causes the fan to switch on and off regularly when the temperature is close to T
MIN
.
2. These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to these registers have
no effect.
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